2026-08-07  Release Manager

	* GCC 16.2.0 released.

2026-08-06  Jakub Jelinek  <jakub@redhat.com>

	Revert:
	2026-07-29  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR middle-end/126405
	* cfgexpand.cc (verify_partition_mem_exprs): New function.
	(pass_expand::execute): Call it.

2026-08-04  Jin Ma  <jinma@linux.alibaba.com>

	Backported from master:
	2026-07-16  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/riscv.cc (riscv_regno_to_class): Map t1 to
	JALR_REGS.
	* config/riscv/riscv.h (RISCV_PROLOGUE_TEMP_REGNUM): Document
	the SIBCALL_REGS restriction.
	(REG_CLASS_CONTENTS): Remove t1 from SIBCALL_REGS.

2026-08-03  Hu, Lin1  <lin1.hu@intel.com>

	PR target/126581
	* config/i386/avx10_2satcvtintrin.h
	(_mm_cvtts_sd_epi32): New alias of _mm_cvtts_sd_i32.
	(_mm_cvtts_sd_epu32): New alias of _mm_cvtts_sd_u32.
	(_mm_cvtts_ss_epi32): New alias of _mm_cvtts_ss_i32.
	(_mm_cvtts_ss_epu32): New alias of _mm_cvtts_ss_u32.
	(_mm_cvtts_roundsd_epi32): New alias of _mm_cvtts_roundsd_i32.
	(_mm_cvtts_roundsd_epu32): New alias of _mm_cvtts_roundsd_u32.
	(_mm_cvtts_roundss_epi32): New alias of _mm_cvtts_roundss_i32.
	(_mm_cvtts_roundss_epu32): New alias of _mm_cvtts_roundss_u32.
	(_mm_cvtts_sd_epi64): New alias of _mm_cvtts_sd_i64.
	(_mm_cvtts_sd_epu64): New alias of _mm_cvtts_sd_u64.
	(_mm_cvtts_ss_epi64): New alias of _mm_cvtts_ss_i64.
	(_mm_cvtts_ss_epu64): New alias of _mm_cvtts_ss_u64.
	(_mm_cvtts_roundsd_epi64): New alias of _mm_cvtts_roundsd_i64.
	(_mm_cvtts_roundsd_epu64): New alias of _mm_cvtts_roundsd_u64.
	(_mm_cvtts_roundss_epi64): New alias of _mm_cvtts_roundss_i64.
	(_mm_cvtts_roundss_epu64): New alias of _mm_cvtts_roundss_u64.

2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/126504
	* match.pd ((CST1 << A) == CST2 -> A == ctz (CST2) - ctz (CST1)):
	If cand isn't representable in TREE_TYPE (@1), simplify to
	cmp == NE_EXPR.
	(((1 << n) & M) != 0 -> n == log2 (M)): Don't simplify if
	log2 doesn't fit into TREE_TYPE (@0).

2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/126503
	* gimple-lower-bitint.cc (bitint_large_huge::handle_plus_minus): If
	IFN_ADDC/IFN_SUBC can't be used and rhs1_type is not the limb type
	and is signed, perform both additions or both subtractions in
	unsigned type for the rhs1_type and cast to rhs1_type at the end.

2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/126497
	* gimplify.cc (recalculate_side_effects): Return for
	tcc_declaration.

2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/126490
	* match.pd ((a & b) == (a ^ b) -> !(a | b)): If @0 has
	integral one bit precision type, use (convert:type ...) around the
	bit_not just in case the comparison has a different result type
	from the type of its operands.  Otherwise do that too but with
	bit_not replaced with bit_xor with one of the appropriate type.

2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/126464
	* range-op-float.cc (float_widen_lhs_range): Remove also_inf
	argument, replace its uses as if it was always true.
	(operator_cast::op1_range): Don't pass third argument to
	float_widen_lhs_range.

2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-31  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/126476
	* match.pd (((C << A) & D) != 0 -> A == 0,
	((C << A) & D) == 0 -> A != 0): Fold to false/true if
	c1 - c2 resp. c2 - c1 doesn't fit into TREE_TYPE (@0).

2026-07-30  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-30  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/126464
	* range-op-float.cc (float_widen_lhs_range): Add also_inf argument
	defaulted to false, if true, extend even lb of +inf and ub of -inf.
	(operator_cast::op1_range): Adjust float_widen_lhs_range caller.

2026-07-30  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-30  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/126084
	* asan.cc (maybe_instrument_call): Don't instrument
	BUILT_IN_ASAN_REPORT_{LOAD,STORE}{1,2,4,8,16,_N} builtins.
	(initialize_sanitizer_builtins): Use
	(*lang_hooks.types.type_for_mode) (ptr_mode, 0) instead of
	pointer_sized_int_mode for PTRMODE arguments.
	(asan_expand_poison_ifn): Likewise.

2026-07-30  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-30  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/126471
	* match.pd (parity(~X) is parity(X)): Only optimize this way
	if element_precision is even, otherwise optimize into parity(X) ^ 1.

2026-07-30  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-29  Jakub Jelinek  <jakub@redhat.com>

	PR target/126446
	* gimple-isel.cc (gimple_expand_vec_set_extract_expr): Punt if
	idx doesn't fit into poly_uint64 but is poly_int_tree_p.  Use
	known_ge rather than known_gt for out of bounds check.  Formatting
	fixes.

2026-07-30  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	Backported from master:
	2026-07-29  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.cc (s390_canonicalize_comparison): Verify op0
	for an UNSPEC_CC_TO_INT is a register.

2026-07-30  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2026-07-28  H.J. Lu  <hjl.tools@gmail.com>
		    Richard Biener   <rguenther@suse.de>

	PR middle-end/126410
	* tree-vect-stmts.cc (vectorizable_store): Only commit to
	recorded base alignment when transforming.
	(vectorizable_load): Likewise.

2026-07-30  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-07-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/126457
	* tree-vect-loop.cc (vectorizable_reduction): Reject
	operations where not all operands correspond to a SLP
	child early.

2026-07-30  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-07-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/126404
	* tree-vect-patterns.cc (vect_recog_popcount_clz_ctz_ffs_pattern):
	Avoid recursing to vect_recog_ctz_ffs_pattern with a reduction.

2026-07-30  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-07-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/126404
	* tree-vect-slp.cc (vect_analyze_slp_reduc_chain): Fixup
	conversion detection.

2026-07-30  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2satcvtintrin.h
	(_mm_cvtts_sd_i32): Renamed from _mm_cvtts_sd_epi32.
	(_mm_cvtts_sd_si32): New alias of _mm_cvtts_sd_i32.
	(_mm_cvtts_sd_u32): Renamed from _mm_cvtts_sd_epu32.
	(_mm_cvtts_ss_i32): Renamed from _mm_cvtts_ss_epi32.
	(_mm_cvtts_ss_si32): New alias of _mm_cvtts_ss_i32.
	(_mm_cvtts_ss_u32): Renamed from _mm_cvtts_ss_epu32.
	(_mm_cvtts_roundsd_i32): Renamed from _mm_cvtts_roundsd_epi32.
	(_mm_cvtts_roundsd_si32): New alias of _mm_cvtts_roundsd_i32.
	(_mm_cvtts_roundsd_u32): Renamed from _mm_cvtts_roundsd_epu32.
	(_mm_cvtts_roundss_i32): Renamed from _mm_cvtts_roundss_epi32.
	(_mm_cvtts_roundss_si32): New alias of _mm_cvtts_roundss_i32.
	(_mm_cvtts_roundss_u32): Renamed from _mm_cvtts_roundss_epu32.
	(_mm_cvtts_sd_i64): Renamed from _mm_cvtts_sd_epi64.
	(_mm_cvtts_sd_si64): New alias of _mm_cvtts_sd_i64.
	(_mm_cvtts_sd_u64): Renamed from _mm_cvtts_sd_epu64.
	(_mm_cvtts_ss_i64): Renamed from _mm_cvtts_ss_epi64.
	(_mm_cvtts_ss_si64): New alias of _mm_cvtts_ss_i64.
	(_mm_cvtts_ss_u64): Renamed from _mm_cvtts_ss_epu64.
	(_mm_cvtts_roundsd_i64): Renamed from _mm_cvtts_roundsd_epi64.
	(_mm_cvtts_roundsd_si64): New alias of _mm_cvtts_roundsd_i64.
	(_mm_cvtts_roundsd_u64): Renamed from _mm_cvtts_roundsd_epu64.
	(_mm_cvtts_roundss_i64): Renamed from _mm_cvtts_roundss_epi64.
	(_mm_cvtts_roundss_si64): New alias of _mm_cvtts_roundss_i64.
	(_mm_cvtts_roundss_u64): Renamed from _mm_cvtts_roundss_epu64.

2026-07-30  Avinash Jayakar  <avinashd@linux.ibm.com>

	Backported from master:
	2026-07-30  Avinash Jayakar  <avinashd@linux.ibm.com>

	PR target/126438
	* config/rs6000/darwin.h (REGISTER_NAMES): Add dmf registers.

2026-07-29  Richard Sandiford  <rdsandiford@googlemail.com>

	Backported from master:
	2026-06-07  Richard Sandiford  <rdsandiford@googlemail.com>

	* doc/sourcebuild.texi: Document that check-function-bodies
	automatically adds the check_function_bodies options.

2026-07-29  Iain Sandoe  <iain@sandoe.co.uk>

	Backported from master:
	2026-06-21  Iain Sandoe  <iain@sandoe.co.uk>

	* doc/sourcebuild.texi: Document object file checks.

2026-07-29  Reshma Roy  <Reshma.Roy@amd.com>

	Backported from master:
	2026-07-28  Reshma Roy  <Reshma.Roy@amd.com>

	* config/i386/i386-features.cc (ix86_emit_tls_call): Additional
	check to see if DRAP register is live in basic block with DF_LR_IN.

2026-07-29  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2026-07-29  H.J. Lu  <hjl.tools@gmail.com>

	PR target/126450
	* config/i386/i386.cc (ix86_spill_register_argument_p): Check
	the argument-linked memory used to store local variable.

2026-07-29  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-29  Jakub Jelinek  <jakub@redhat.com>

	PR target/126446
	* config/i386/i386-expand.cc (ix86_expand_vector_set): If elt is
	out of bounds, emit a no-op move.

2026-07-29  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-29  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/126447
	* gimple-lower-bitint.cc (gimple_lower_bitint): For
	ifn calls with large/huge _BitInt (ab) SSA_NAME lhs if they
	have such (ab) argument too, force it into temporary SSA_NAME
	for IFN_UBSAN_CHECK_MUL and, if bitint_big_endian, also for
	IFN_UBSAN_CHECK_{ADD,SUB}.

2026-07-29  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-07-28  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR middle-end/126405
	* cfgexpand.cc (verify_partition_mem_exprs): New function.
	(pass_expand::execute): Call it.

2026-07-29  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-07-28  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR middle-end/126405
	* tree-outof-ssa.cc (split_overlapping_partition_decls): Also split
	partitions of PARM_DECLs and RESULT_DECLs.

2026-07-29  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-07-28  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR middle-end/126405
	* cfgexpand.cc (leader_merge): Rename to...
	(expand_leader_merge): ...this.  Make external.
	* cfgexpand.h (expand_leader_merge): Declare.
	* tree-outof-ssa.cc: Include cfgexpand.h.
	(split_overlapping_partition_decls): Determine the variable of a
	partition from all of its names.

2026-07-28  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-07-25  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR rtl-optimization/126184
	* ifcvt.cc (init_noce_multiple_sets_info): Record only the most
	recent prior definition of each pseudo register.

2026-07-28  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-07-25  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR rtl-optimization/126184
	* ifcvt.cc (init_noce_multiple_sets_info): Assert that destinations
	are pseudos.
	(bb_ok_for_noce_convert_multiple_sets): Reject hard-register
	destinations.

2026-07-28  Haochen Jiang  <haochen.jiang@intel.com>

	Backported from master:
	2026-07-28  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/126429
	* config/i386/sse.md (avx512fmaskhalfmode): Removed.
	(avx512f_dpbf16ps_<mode>_maskz): Use avx512fmaskmode instead of
	avx512fmaskhalfmode.
	(avx512f_dpbf16ps_<mode>_mask): Ditto.
	(avx512f_dpbf16ps_<mode><maskz_half_name>): Rename to ...
	(avx512f_dpbf16ps_<mode><sd_maskz_name>): ... this. Use
	corresponding sd_mask_op4.
	* config/i386/subst.md (maskz_half): Remove not used pattern.

2026-07-27  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-27  Jakub Jelinek  <jakub@redhat.com>

	* doc/sourcebuild.texi (arm_neon_fp16_hw, arm_fp16_alternative_hw):
	Use @code{...} instead of @code(...).

2026-07-27  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	Backported from master:
	2026-07-27  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	* doc/sourcebuild.texi (arm_fp16_alternative_hw): Document.
	(arm_neon_fp16_hw): Add reference to arm_neon_fp16_ok.

2026-07-27  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	Backported from master:
	2026-05-26  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/125396
	* tree-cfgcleanup.cc (bb_phis_references_abnormal_uses): New function.
	(maybe_remove_forwarder_block): Check to make sure the
	forwarder block does not have a phi that references ssa name that has
	abnormal uses.

2026-07-27  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	Backported from master:
	2026-05-15  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/125290
	* tree-cfg.cc (group_case_labels_stmt): Remove code that was
	added to remove `cases` that goto blocks of unreachable.
	* tree-ssa-forwprop.cc (optimize_unreachable): Remove the
	comment about switch cases being handled.

2026-07-25  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2026-07-24  H.J. Lu  <hjl.tools@gmail.com>
		    Uros Bizjak  <ubizjak@gmail.com>

	PR target/126320
	* config/i386/i386.cc (ix86_spill_register_argument_p): New
	function.
	(ix86_argument_passed_on_stack_p): Add a pattern argument.  Call
	ix86_spill_register_argument_p to check spill of register argument
	by callee.
	(ix86_update_stack_alignment): Pass pat to
	ix86_argument_passed_on_stack_p.

2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	Backported from master:
	2026-07-23  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	* config/rs6000/mma.md (UNSPEC_DMF_DMXVF16GERX2): New UNSPEC entry.
	(UNSPEC_DMF_DMXVF16GERX2PP): Likewise.
	(UNSPEC_DMF_DMXVF16GERX2PN): Likewise.
	(UNSPEC_DMF_DMXVF16GERX2NP): Likewise.
	(UNSPEC_DMF_DMXVF16GERX2NN): Likewise.
	(UNSPEC_DMF_PMDMXVF16GERX2): Likewise.
	(UNSPEC_DMF_PMDMXVF16GERX2PP): Likewise.
	(UNSPEC_DMF_PMDMXVF16GERX2PN): Likewise.
	(UNSPEC_DMF_PMDMXVF16GERX2NP): Likewise.
	(UNSPEC_DMF_PMDMXVF16GERX2NN): Likewise.
	(DMF_PV): Add UNSPEC_DMF_DMXVF16GERX2.
	(DMF_DPV): Add f16 variants.
	(DMF_PVI8I4I2): Add UNSPEC_DMF_PMDMXVF16GERX2.
	(DMF_DPVI8I4I2): Add f16 prefixed variants.
	(pv): Add dmxvf16gerx2 attribute.
	(dpv): Add f16 attributes.
	(pvi8i4i2): Add pmdmxvf16gerx2 attribute.
	(dpvi8i4i2): Add f16 prefixed attributes.
	* config/rs6000/rs6000-builtins.def (__builtin_mma_dmxvf16gerx2): New
	builtin.
	(__builtin_mma_dmxvf16gerx2pp): Likewise.
	(__builtin_mma_dmxvf16gerx2pn): Likewise.
	(__builtin_mma_dmxvf16gerx2np): Likewise.
	(__builtin_mma_dmxvf16gerx2nn): Likewise.
	(__builtin_mma_pmdmxvf16gerx2): Likewise.
	(__builtin_mma_pmdmxvf16gerx2pp): Likewise.
	(__builtin_mma_pmdmxvf16gerx2pn): Likewise.
	(__builtin_mma_pmdmxvf16gerx2np): Likewise.
	(__builtin_mma_pmdmxvf16gerx2nn): Likewise.
	(__builtin_mma_dmxvf16gerx2_internal): New internal builtin.
	(__builtin_mma_dmxvf16gerx2pp_internal): Likewise.
	(__builtin_mma_dmxvf16gerx2pn_internal): Likewise.
	(__builtin_mma_dmxvf16gerx2np_internal): Likewise.
	(__builtin_mma_dmxvf16gerx2nn_internal): Likewise.
	(__builtin_mma_pmdmxvf16gerx2_internal): Likewise.
	(__builtin_mma_pmdmxvf16gerx2pp_internal): Likewise.
	(__builtin_mma_pmdmxvf16gerx2pn_internal): Likewise.
	(__builtin_mma_pmdmxvf16gerx2np_internal): Likewise.
	(__builtin_mma_pmdmxvf16gerx2nn_internal): Likewise.
	* doc/extend.texi (PowerPC Matrix-Multiply Assist Built-in Functions):
	Document new MMA+ builtins for f16 operations.

2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	Backported from master:
	2026-07-23  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	* config/rs6000/mma.md (UNSPEC_DMF_DMXVI8GERX4SPP): New UNSPEC entry.
	(UNSPEC_DMF_PMDMXVI8GERX4SPP): Likewise.
	(UNSPEC_DMF_DMXVBF16GERX2): Likewise.
	(UNSPEC_DMF_DMXVBF16GERX2PP): Likewise.
	(UNSPEC_DMF_DMXVBF16GERX2PN): Likewise.
	(UNSPEC_DMF_DMXVBF16GERX2NP): Likewise.
	(UNSPEC_DMF_DMXVBF16GERX2NN): Likewise.
	(UNSPEC_DMF_PMDMXVBF16GERX2): Likewise.
	(UNSPEC_DMF_PMDMXVBF16GERX2PP): Likewise.
	(UNSPEC_DMF_PMDMXVBF16GERX2PN): Likewise.
	(UNSPEC_DMF_PMDMXVBF16GERX2NP): Likewise.
	(UNSPEC_DMF_PMDMXVBF16GERX2NN): Likewise.
	(DMF_PV): Add UNSPEC_DMF_DMXVBF16GERX2.
	(DMF_DPV): Add bf16 and int8 signed accumulate variants.
	(DMF_DPVI8I4I4): Add UNSPEC_DMF_PMDMXVI8GERX4SPP.
	(DMF_PVI8I4I2): New int iterator.
	(DMF_DPVI8I4I2): Likewise.
	(pv): Add dmxvbf16gerx2 attribute.
	(apv): Removed dmxvi8gerx4pp attribute.
	(dpv): New attribute.
	(dpvi8i4i4): Add pmdmxvi8gerx4spp attribute.
	(pvi8i4i2): New attribute.
	(dpvi8i4i2): Likewise.
	(dmf_<dpv>): Rename from dmf_<apv> and update to use dpv attribute.
	(dmf_<pvi8i4i2>): New insn pattern.
	(dmf_<dpvi8i4i2>): Likewise.
	* config/rs6000/rs6000-builtins.def (__builtin_mma_dmxvi8gerx4spp): New
	builtin.
	(__builtin_mma_pmdmxvi8gerx4spp): Likewise.
	(__builtin_mma_dmxvbf16gerx2): Likewise.
	(__builtin_mma_dmxvbf16gerx2pp): Likewise.
	(__builtin_mma_dmxvbf16gerx2pn): Likewise.
	(__builtin_mma_dmxvbf16gerx2np): Likewise.
	(__builtin_mma_dmxvbf16gerx2nn): Likewise.
	(__builtin_mma_pmdmxvbf16gerx2): Likewise.
	(__builtin_mma_pmdmxvbf16gerx2pp): Likewise.
	(__builtin_mma_pmdmxvbf16gerx2pn): Likewise.
	(__builtin_mma_pmdmxvbf16gerx2np): Likewise.
	(__builtin_mma_pmdmxvbf16gerx2nn): Likewise.
	(__builtin_mma_dmxvi8gerx4spp_internal): New internal builtin.
	(__builtin_mma_pmdmxvi8gerx4spp_internal): Likewise.
	(__builtin_mma_dmxvbf16gerx2_internal): Likewise.
	(__builtin_mma_dmxvbf16gerx2pp_internal): Likewise.
	(__builtin_mma_dmxvbf16gerx2pn_internal): Likewise.
	(__builtin_mma_dmxvbf16gerx2np_internal): Likewise.
	(__builtin_mma_dmxvbf16gerx2nn_internal): Likewise.
	(__builtin_mma_pmdmxvbf16gerx2_internal): Likewise.
	(__builtin_mma_pmdmxvbf16gerx2pp_internal): Likewise.
	(__builtin_mma_pmdmxvbf16gerx2pn_internal): Likewise.
	(__builtin_mma_pmdmxvbf16gerx2np_internal): Likewise.
	(__builtin_mma_pmdmxvbf16gerx2nn_internal): Likewise.
	* doc/extend.texi (PowerPC Matrix-Multiply Assist Built-in Functions):
	Document new MMA+ builtins for int8 and bf16 operations.

2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	Backported from master:
	2026-07-23  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_dmr_extract512): New
	built-in.
	(__builtin_disassemble_dmr): Likewise.
	(__builtin_dmr_extract512_internal): New internal built-in.
	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin):
	Exempt RS6000_BIF_DISASSEMBLE_DMR from the early-return guard.
	Generate appropriate gimple code for the extract builtins.

2026-07-24  Avinash Jayakar  <avinashd@linux.ibm.com>

	Backported from master:
	2026-07-23  Avinash Jayakar  <avinashd@linux.ibm.com>
		    Vijay Shankar  <vijay@linux.ibm.com>

	* config/rs6000/mma.md (mma_xxsetaccz): Use wD constraint and
	accumulator operand.
	(mma_<vv>): Likewise.
	(mma_<avv>): Likewise.
	(mma_<pv>): Likewise.
	(mma_<apv>): Likewise.
	(mma_<vvi4i4i8>): Likewise.
	(mma_<avvi4i4i8>): Likewise.
	(mma_<vvi4i4i2>): Likewise.
	(mma_<avvi4i4i2>): Likewise.
	(mma_<vvi4i4>): Likewise.
	(mma_<avvi4i4>): Likewise.
	(mma_<pvi4i2>): Likewise.
	(mma_<apvi4i2>): Likewise.
	(mma_<vvi4i4i4>): Likewise.
	(mma_<avvi4i4i4>): Likewise.
	* config/rs6000/rs6000.cc (print_operand): Print DMR register
	numbers if dense math option enabled.

2026-07-24  Kishan Parmar  <kishan@linux.ibm.com>

	Backported from master:
	2026-07-23  Peter Bergner  <bergner@linux.ibm.com>
		    Surya Kumari Jangala  <jskumari@linux.ibm.com>
		    Kishan Parmar  <kishan@linux.ibm.com>

	* config/rs6000/mma.md (MAX_MMA_OPERANDS): Increase from 7 to 9.
	(UNSPEC_DMF_DMXOR): New unspec.
	(UNSPEC_DMF_DMXVI8GERX4): Likewise.
	(UNSPEC_DMF_DMXVI8GERX4PP): Likewise.
	(UNSPEC_DMF_PMDMXVI8GERX4): Likewise.
	(UNSPEC_DMF_PMDMXVI8GERX4PP): Likewise.
	(UNSPEC_DMF_DMSETDMRZ): Likewise.
	(DMF_PV): New iterator.
	(DMF_DPV): Likewise.
	(DMF_PVI8I4I4): Likewise.
	(DMF_DPVI8I4I4): Likewise.
	(pv): Add DMF mappings.
	(apv): Likewise.
	(pvi8i4i4): New attribute.
	(dpvi8i4i4): Likewise.
	(dmf_build_dmr): New define_expand.
	(dmf_dmsetdmrz): New insn.
	(dmf_dmxor): Likewise.
	(dmf_<pv>): New insn pattern.
	(dmf_<apv>): Likewise.
	(dmf_<pvi8i4i4>): Likewise.
	(dmf_<dpvi8i4i4>): Likewise.
	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin): Add
	DMF builtin support. Handle DMR pass-by-reference semantics.
	Support up to nine builtin operands.
	(mma_expand_builtin): Likewise.
	(rs6000_expand_builtin): Handle DMF builtins.
	* config/rs6000/rs6000-builtins.def: Add DMF and MMA+ builtin
	definitions.
	* doc/extend.texi
	(PowerPC Matrix-Multiply Assist Built-in Functions): Document
	MMA+ builtins.
	(PowerPC Dense Math Facility Built-in Functions): Document DMF builtins.

2026-07-24  Manjunath S Matti  <mmatti@linux.ibm.com>

	Backported from master:
	2026-07-23  Manjunath Matti  <mmatti@linux.ibm.com>

	* config/rs6000/rs6000.h (RS6000_BTI_dmr1024): New enumerator.
	(RS6000_BTI_ptr_dmr1024): New enumerator.
	(dmr1024_type_node): New macro.
	(ptr_dmr1024_type_node): New macro.
	* config/rs6000/rs6000-builtin.cc (rs6000_type_string): Handle
	dmr1024_type_node.
	(rs6000_init_builtins): Register the __dmr1024 opaque type and
	its pointer-to-const variant, with 512-bit alignment.
	* config/rs6000/rs6000.cc (rs6000_mangle_type): Handle
	dmr1024_type_node.
	(rs6000_invalid_conversion): Reject conversions to/from TDOmode.
	(rs6000_opaque_type_invalid_use_p): Gate __vector_quad and
	__vector_pair on TARGET_MMA and __dmr1024 on TARGET_DMF
	independently, and require -mdense-math for __dmr1024.

2026-07-24  Vijay Shankar  <vijay@linux.ibm.com>

	Backported from master:
	2026-07-22  Vijay Shankar  <vijay@linux.ibm.com>

	* config/rs6000/mma.md (*movxo): renamed to movxo_nodmf
	(*movxo_nodmf): updated contraint to use wD and add !TARGET_DMF
	(*movxo_dmf): New pattern to handle dmf insert/extract from vsx

2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	Backported from master:
	2026-07-22  Surya Kumari Jangala  <jskumari@linux.ibm.com>
		    Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/mma.md (UNSPEC_DMR_RELOAD_FROM_MEMORY): New unspec.
	(UNSPEC_DMR_RELOAD_TO_MEMORY): Likewise.
	(reload_tdo_load): New define_insn_and_split.
	(reload_tdo_store): Likewise.
	* config/rs6000/rs6000.cc (rs6000_init_hard_regno_mode_ok): Set
	reload_load and reload_store for TDOmode when TARGET_DMF.

2026-07-24  Jeevitha  <jeevitha@linux.ibm.com>

	Backported from master:
	2026-07-22  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

	* config/rs6000/mma.md (UNSPEC_DMF_EXTRACT512): New unspec.
	(dm_extract512): New insn.
	(movtdo): New expander.
	(*movtdo): New insn_and_split to support TDOmode moves between
	memory, VSX registers, and Dense Math Registers.
	* config/rs6000/rs6000.cc (rs6000_emit_move): Diagnose constant
	assignments to TDOmode objects.
	(rs6000_split_multireg_move): Handle TDOmode when splitting
	multi-register moves.

2026-07-24  Kishan Parmar  <kishan@linux.ibm.com>

	Backported from master:
	2026-07-22  Kishan Parmar  <kishan@linux.ibm.com>

	* config/rs6000/mma.md (UNSPEC_DMF_INSERT512): New unspec.
	(UNSPEC_DMF_INSERT1024): Likewise.
	(movoo): Enable for TARGET_DMF.
	(*movoo): Likewise.
	(vsx_assemble_pair): Likewise.
	(*vsx_assemble_pair): Likewise.
	(vsx_disassemble_pair): Likewise.
	(*vsx_disassemble_pair): Likewise.
	(dm_insert512): New insn.
	(dm_insert1024): Likewise.
	(mma_assemble_acc): Use accumulator_operand.
	Build accumulators via DMR insert operations when TARGET_DMF.
	(*mma_assemble_acc): Use accumulator_operand.
	(mma_<acc>): New define_expand treating xxmtacc/xxmfacc as no-ops
	for TARGET_DMF.
	(*mma_<acc>): Restrict to !TARGET_DMF and use accumulator_operand.
	(mma_disassemble_acc): Use accumulator_operand.
	* config/rs6000/predicates.md (dmr_register_operand): New predicate.
	(gpc_reg_operand): Accept DMR registers.
	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin): Do
	not emit xxmfacc for DISASSEMBLE_ACC when TARGET_DMF.
	* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Allow
	OOmode in VSX register pairs for TARGET_DMF.
	(rs6000_split_multireg_move): Avoid emitting xxmtacc/xxmfacc when
	TARGET_DMF.
	* config/rs6000/rs6000.md (type): Add dmf type.
	(isa): Add mma and dmf ISA attributes.
	(enabled): Add mma and dmf enable conditions.

2026-07-24  Avinash Jayakar  <avinashd@linux.ibm.com>

	Backported from master:
	2026-07-22  Avinash Jayakar  <avinashd@linux.ibm.com>

	* config/rs6000/constraints.md
	(rs6000_constraints[RS6000_CONSTRAINT_wD]): New wD constraint.
	* config/rs6000/predicates.md (accumulator_operand): New predicate.
	* config/rs6000/rs6000.cc (rs6000_debug_reg_global): Support wD
	register class.
	(rs6000_init_hard_regno_mode_ok): Map wD to FLOAT_REGS.
	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add wD constraint.
	* doc/md.texi: Document the new constraint.

2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	Backported from master:
	2026-07-22  Surya Kumari jangala  <jskumari@linux.ibm.com>

	* config/rs6000/rs6000.cc (enum rs6000_reg_type): Add DMR_REG_TYPE.
	(enum rs6000_reload_reg_type): Add RELOAD_REG_DMR.
	(LAST_RELOAD_REG_CLASS): Update to RELOAD_REG_DMR.
	(reload_reg_map): Add DMR entry.
	(rs6000_reg_names): Add DMR register names.
	(alt_reg_names): Add alternate DMR register names.
	(rs6000_hard_regno_nregs_internal): Handle DMR registers.
	(rs6000_hard_regno_mode_ok_uncached): Add TDOmode and XOmode support for
	DMR registers.
	(rs6000_debug_reg_global): Add TDOmode to debug modes and print DMR
	register range.
	(rs6000_setup_reg_addr_masks): Handle RELOAD_REG_DMR.
	Allow offset loads for TDOmode values.
	(rs6000_init_hard_regno_mode_ok): Add DMR_REGS to reg_class_to_reg_type
	mapping.
	Update precalculation of CLASS_MAX_NREGS.
	(rs6000_secondary_reload_memory): Handle DMR_REGS class.
	(rs6000_secondary_reload_simple_move): Add DMR to VSX moves.
	(rs6000_preferred_reload_class): Handle DMR_REGS.
	(rs6000_modes_tieable_p): Exclude TDOmode from register tying.
	(reg_offset_addressing_ok_p): Allow XOmode with TARGET_DMF.
	Add TDOmode support with TARGET_DMF.
	(rs6000_secondary_reload_class): Handle DMR_REGS reload routing.
	(rs6000_dmr_register_move_cost): New helper.
	(rs6000_register_move_cost): Handle DMR_REGS as source or destination.
	(rs6000_memory_move_cost): Add DMR_REGS case routing cost through VSX.
	(rs6000_compute_pressure_classes): Add DMR_REGS when TARGET_DMF.
	(rs6000_debugger_regno): Add DMR register numbering.
	* config/rs6000/rs6000.h (UNITS_PER_DMR_WORD): Define as 128.
	(FIRST_PSEUDO_REGISTER): Increase from 111 to 119.
	(FIXED_REGISTERS): Add 8 DMR registers as non-fixed.
	(CALL_USED_REGISTERS): Mark all DMR registers as call-used.
	(REG_ALLOC_ORDER): Add DMR registers to allocation order.
	(DMR_REGNO_P): New macro.
	(VECTOR_ALIGNMENT_P): Add TDOmode.
	(enum reg_class): Add DMR_REGS entry.
	(REG_CLASS_CONTENTS): Add DMR_REGS bitmask.
	(REGISTER_NAMES): Add dmr0-dmr7 register names.
	(ADDITIONAL_REGISTER_NAMES): Add dmr0-dmr7 mappings.
	* config/rs6000/rs6000.md (FIRST_DMR_REGNO): Define as 111.
	(LAST_DMR_REGNO): Define as 118.

2026-07-24  Jeevitha  <jeevitha@linux.ibm.com>

	Backported from master:
	2026-07-21  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
		    Kishan Parmar  <kishan@linux.ibm.com>

	* config/rs6000/rs6000.cc (print_operand): Add the `%W`
	print modifier to print the VSX register number plus two.

2026-07-24  Kishan Parmar  <kishan@linux.ibm.com>

	Backported from master:
	2026-07-16  Peter Bergner  <bergner@linux.ibm.com>
		    Kishan Parmar  <kishan@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add
	ENB_DM diagnostic.
	(rs6000_builtin_is_supported): Handle ENB_DM.
	* config/rs6000/rs6000-gen-builtins.cc: Update comments for new
	Dense Math builtin attributes.
	(bif_stanza): Add BSTZ_DM.
	(stanza_map): Add "dm" stanza.
	(enable_string): Add ENB_DM.
	(basetype): Add BT_DMR.
	(attrinfo): Add isdm, isdmint and isdmr fields.
	(type_map): Add dmr1024 and ptr_dmr1024 type mappings.
	(match_type): Recognize dmr1024 type.
	(parse_bif_attrs): Parse dm, dmint and dmr attributes.
	(complete_vector_type): Handle BT_DMR.
	(write_decls): Emit ENB_DM and Dense Math builtin attribute bits
	and predicates.
	(write_bif_static_init): Initialize Dense Math builtin attributes
	and associate dmint builtins with their internal variants.

2026-07-24  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

	Backported from master:
	2026-07-13  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

	* config/rs6000/rs6000-call.cc (rs6000_return_in_memory): Handle
	TDOmode and emit "Dense Math" diagnostics.
	(rs6000_function_arg): Reject TDOmode function parameters and
	emit "Dense Math" diagnostics.
	* config/rs6000/rs6000-modes.def: Add TDOmode.

2026-07-24  jeevitha  <jeevitha@linux.ibm.com>

	Backported from master:
	2026-07-11  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): Add OPTION_MASK_DMF.
	(POWERPC_MASKS): Likewise.
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Enable
	OPTION_MASK_DMF by default when TARGET_FUTURE is set and the
	flag was not explicitly given; emit an error and clear the flag
	when -mdense-math is requested on a non-future target.
	(rs6000_opt_masks): Add "dense-math" entry for OPTION_MASK_DMF.
	* config/rs6000/rs6000.opt (mdense-math): New option backed by Mask(DMF).
	* doc/invoke.texi: Add -mdense-math.

2026-07-24  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-07-21  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR middle-end/126341
	* tree-outof-ssa.cc (split_overlapping_partition_decls): Preserve
	DECL_IGNORED_P.  Check that the replacement uses memory.

2026-07-24  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-07-14  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR target/123625
	PR target/121957
	* tree-outof-ssa.cc (split_overlapping_partition_decls): New function.
	Use use_register_for_decl to identify memory partitions.
	(remove_ssa_form): Call split_overlapping_partition_decls.

2026-07-24  Boudewijn van der Heide  <boudewijn@delta-utec.com>

	Backported from master:
	2026-05-11  Boudewijn van der Heide  <boudewijn@delta-utec.com>

	PR rtl-optimization/125209
	* combine.cc (make_compound_operation_int): Return NULL_RTX if we got CLOBBER.

2026-07-24  Roger Sayle  <roger@nextmovesoftware.com>

	Backported from master:
	2026-05-08  Roger Sayle  <roger@nextmovesoftware.com>

	PR middle-end/124637
	* calls.cc (load_register_parameters): If using store_constructor
	to place a constant structure in a register, use a right shift to
	align the structure/padding if required on big-endian targets.

2026-07-24  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-07-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/126171
	* tree-scalar-evolution.cc (scev_dfs::add_to_evolution):
	Remove code argument.  Remove MINUS_EXPR handling here.
	(scev_dfs::follow_ssa_edge_binary): Likewise.
	(scev_dfs::follow_ssa_edge_expr): Handle MINUS_EXPR
	separately here, promoting the whole operation to unsigned
	instead of just the addend.

2026-07-24  Cem Akgok  <cemakgok@gmail.com>

	Backported from master:
	2026-07-14  Cem Akgok  <cemakgok@gmail.com>

	PR tree-optimization/126225
	* tree-vect-loop.cc (vect_slp_induction_reuse_p): New function.
	(vectorizable_induction): Validate SLP induction IV reuse.  Reuse
	generated IVs cyclically when filling the SLP group.

2026-07-24  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	Backported from master:
	2026-07-21  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR tree-optimization/124663
	* match.pd: Fold constant conditional selects.

2026-07-23  Tobias Burnus  <tburnus@baylibre.com>

	Backported from master:
	2026-07-23  Tobias Burnus  <tburnus@baylibre.com>

	* config/gcn/gcn-devices.def (gfx9-4-generic): Set sram-ecc
	default to HSACO_ATTR_ANY.

2026-07-21  Vineet Gupta  <vineet.gupta@linux.dev>

	Backported from master:
	2026-07-20  Vineet Gupta  <vineet.gupta@linux.dev>

	* config/bpf/bpf.cc (bpf_insn_cost): Return pattern_cost () by default.

2026-07-21  Vineet Gupta  <vineet.gupta@linux.dev>

	Backported from master:
	2026-07-20  Vineet Gupta  <vineet.gupta@linux.dev>

	* config/bpf/bpf.cc (bpf_rtx_costs): set CONST_INT 0 insns.
	* config/bpf/bpf.h (BPF_IMM32_P): New helper macro.
	* config/bpf/predicates.md (imm32_operand): Use new macro.

2026-07-21  Vineet Gupta  <vineet.gupta@linux.dev>

	Backported from master:
	2026-07-20  Vineet Gupta  <vineet.gupta@linux.dev>

	* config/bpf/bpf.cc (bpf_rtx_costs): Assign MPY/DIV/MOD cost 1.

2026-07-21  Dhruv Chawla  <dhruvc@nvidia.com>

	Backported from master:
	2026-06-01  Dhruv Chawla  <dhruvc@nvidia.com>

	* config/bpf/bpf.cc (bpf_asm_named_section): Fix typos.
	* config/bpf/core-builtins.cc (remove_parser_plugin): Likewise.
	(make_core_relo): Likewise.
	(bpf_handle_plugin_finish_type): Likewise.
	(bpf_output_core_reloc): Likewise.
	(core_make_builtins): Likewise.

2026-07-21  Martin Jambor  <mjambor@suse.cz>

	Backported from master:
	2026-07-09  Martin Jambor  <mjambor@suse.cz>

	PR ipa/125207
	* ipa-cp.cc (decide_about_value): Add detailed dumping about skipping
	a value when there are no edges for it.  Make dumping about skipping
	because of growth limit violation consistent with other cases.
	(decide_whether_version_node): Only create all-context nodes for local
	nodes, remove the logic doing it in other cases, allow cloning for
	single constant lattices for non-local nodes.  Adjust dumping.

2026-07-20  Alice Carlotti  <alice.carlotti@arm.com>

	* config/aarch64/aarch64.cc (aarch64_start_call_args): Extend
	comment.

2026-07-20  Alice Carlotti  <alice.carlotti@arm.com>

	* config/aarch64/aarch64.cc (aarch64_mode_confluence): Fix
	comment typo.
	* target.def (mode_switching): Fix incorrect variable names in
	documentation.
	* doc/tm.texi: Regenerate.

2026-07-20  Alice Carlotti  <alice.carlotti@arm.com>

	PR target/119210
	* config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state):
	Add PSTATE.ZA enablement, and zero it if already enabled.

2026-07-20  Alice Carlotti  <alice.carlotti@arm.com>

	* config/aarch64/aarch64-sme.md (aarch64_sme_write_zt): Add
	ZTO_REGNUM use and make unspec non-volatile.

2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	Backported from master:
	2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR testsuite/126261
	* doc/sourcebuild.texi (can_deref_null): Document.

2026-07-20  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-06-29  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR target/105116
	* lra-constraints.cc (simplify_operand_subreg): Reload a
	non-representable narrowing subreg of a hard register through
	memory instead of resolving it lossily.

2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	Backported from master:
	2026-07-13  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR driver/124058
	* common.opt (Wuse-after-free): Make an alias for
	-Wuse-after-free=1.
	* doc/invoke.texi: Document alias.
	* gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
	Use OPT_Wuse_after_free_.
	* gcc-diagnostic-spec.cc (nowarn_spec_t::nowarn_spec_t):
	Likewise.

2026-07-16  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-16  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/126262
	* gimple-lower-bitint.cc (build_bitint_stmt_ssa_conflicts): Treat
	IFN_MUL_OVERFLOW and IFN_UBSAN_CHECK_MUL like IFN_BSWAP, regardless
	of bitint_big_endian.

2026-07-15  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-07-15  Jakub Jelinek  <jakub@redhat.com>
